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1. general description the 74avc32t245 is a 32-bit transceiver with bidirectional level voltage translation and 3-state outputs. the device can be used as eight 8-bit input-output ports (nan and nbn), two 16-bit transceiver or as a 32-bit transceiver. it has dual supplies (v cc(a) and v cc(b) ) for voltage translation and four 8-bit input-output ports (nan and nbn) each with its own output enable (noe ) and send/receive (ndir) input for direction control. v cc(a) and v cc(b) can be independently supplied at any voltage between 0.8 v and 3.6 v making the device suitable for low voltage translation between any of the following voltages: 0.8 v, 1.2 v, 1.5 v, 1.8 v, 2.5 v and 3.3 v. a high on ndir selects transmission from nan to nbn while a low on ndir selects transmission from nbn to nan. a high on noe causes the outputs to assume a high-impedance off-state the device is fully specified for pa rtial power-down applications using i off . the i off circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. in suspend mode when either v cc(a) or v cc(b) are at gnd level, both nan and nbn are in the high-impedance off-state. 2. features and benefits ? wide supply voltage range: ? v cc(a) : 0.8 v to 3.6 v ? v cc(b) : 0.8 v to 3.6 v ? complies with jedec standards: ? jesd8-12 (0.8 v to 1.3 v) ? jesd8-11 (0.9 v to 1.65 v) ? jesd8-7 (1.2 v to 1.95 v) ? jesd8-5 (1.8 v to 2.7 v) ? jesd8-b (2.7 v to 3.6 v) ? esd protection: ? hbm jesd22-a114f class 3b exceeds 8000 v ? mm jesd22-a115-a exceeds 200 v ? cdm jesd22-c101d exceeds 1000 v ? maximum data rates: ? 380 mbit/s ( ? 1.8 v to 3.3 v translation) ? 200 mbit/s ( ? 1.1 v to 3.3 v translation) ? 200 mbit/s ( ? 1.1 v to 2.5 v translation) ? 200 mbit/s ( ? 1.1 v to 1.8 v translation) ? 150 mbit/s ( ? 1.1 v to 1.5 v translation) 74avc32t245 32-bit dual supply translating transceiver wi th configurable voltage translation; 3-state rev. 1 ? 16 january 2013 product data sheet
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 2 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state ? 100 mbit/s ( ? 1.1 v to 1.2 v translation) ? suspend mode ? latch-up performance exceeds 100 ma per jesd 78 class ii ? inputs accept voltages up to 3.6 v ? i off circuitry provides partial power-down mode operation ? multiple package options ? specified from ? 40 ? cto+85 ? c and ? 40 ? cto+125 ? c 3. ordering information 4. functional diagram table 1. ordering information type number package temperature range name description version 74avc32t245ec ? 40 ? cto+125 ? c lfbga96 plastic low profile fine-pitch ball grid array package; 96 balls; body 13.5 ? 5.5 ? 1.05 mm sot536-1 fig 1. logic diagram

74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 3 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state fig 2. logic symbol

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74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 4 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state 5. pinning information 5.1 pinning 5.2 pin description [1] all gnd pins must be connected to ground (0 v). fig 3. pin configuration sot536-1 (lfbga96) ) * ( ' & $ # % ! " )++,- . ,/ 0

table 2. pin description symbol ball description 1dir, 2dir, 3dir, 4dir a3, h3 , j3, t3 direction control 1oe , 2oe , 3oe , 4oe a4, h4, j4, t4 output enable input (active low) 1a1 to 1a8 a5, a6, b5, b6, c5, c6, d5, d6 input or output 1b1 to 1b8 a2, a1, b2, b1, c2, c1, d2, d1 input or output 2a1 to 2a8 e5, e6, f5, f6, g5, g6, h6, h5 input or output 2b1 to 2b8 e2, e1, f2, f1, g2, g1, h1, h2 input or output 3a1 to 3a8 j5, j6, k5, k6, l5 , l6, m5, m6 input or output 3b1 to 3b8 j2, j1, k2, k1, l2 , l1, m2, m1 input or output 4a1 to 4a8 n5, n6, p5, p6, r5, r6, t6, t5 input or output 4b1 to 4b8 n2, n1, p2, p1, r2, r1, t1, t2 input or output gnd [1] b3, b4, d3, d4, e3, e4, g3, g4, k3, k4, m3, m4, n3, n4, r3, r4 ground (0 v) v cc(a) c4, f4, l4, p4 supply voltage a (nan, noe and ndir inputs are referenced to v cc(a) ) v cc(b) c3, f3, l3, p3 supply voltage b (n bn inputs are referenced to v cc(b) )
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 5 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state 6. functional description [1] h = high voltage level; l = low voltage level; x = don?t care; z = high-impedance off-state. [2] the nan, ndir and noe input circuit is referenced to v cc(a) ; the nbn input circuit is referenced to v cc(b) . [3] if at least one of v cc(a) or v cc(b) is at gnd level, the device goes into suspend mode. 7. limiting values [1] the minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are obs erved. [2] v cco is the supply voltage associated with the output port. [3] v cco + 0.5 v should not exceed 4.6 v. [4] above 70 ? c the value of p tot derates linearly with 1.8 mw/k. table 3. function table [1] supply voltage input input/output [3] v cc(a) , v cc(b) noe [2] ndir [2] nan [2] nbn [2] 0.8 v to 3.6 v l l nan = nbn input 0.8 v to 3.6 v l h input nbn = nan 0.8 v to 3.6 v h x z z gnd [3] xxzz table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc(a) supply voltage a ? 0.5 +4.6 v v cc(b) supply voltage b ? 0.5 +4.6 v i ik input clamping current v i <0v ? 50 - ma v i input voltage [1] ? 0.5 +4.6 v i ok output clamping current v o <0v ? 50 - ma v o output voltage active mode [1] [2] [3] ? 0.5 v cco +0.5 v suspend or 3-state mode [1] ? 0.5 +4.6 v i o output current v o =0vtov cco [2] - ? 50 ma i cc supply current per v cc(a) or v cc(b) pin - 100 ma i gnd ground current per gnd pin ? 100 - ma t stg storage temperature ? 65 +150 ?c p tot total power dissipation t amb = ? 40 ? c to +125 ?c lfbga96 package [4] - 1000 mw
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 6 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state 8. recommended operating conditions [1] v cco is the supply voltage associated with the output port. [2] v cci is the supply voltage associated with the input port. 9. static characteristics [1] v cco is the supply voltage associated with the output port. [2] v cci is the supply voltage associated with the data input port. [3] for i/o ports, the parameter i oz includes the input leakage current. table 5. recommended operating conditions symbol parameter conditions min max unit v cc(a) supply voltage a 0.8 3.6 v v cc(b) supply voltage b 0.8 3.6 v v i input voltage 0 3.6 v v o output voltage active mode [1] 0v cco v suspend or 3-state mode 0 3.6 v t amb ambient temperature ? 40 +125 ?c ? t/ ? v input transition rise and fall rate v cci = 0.8 v to 3.6 v [2] -5n s / v table 6. typical static characteristics at t amb = 25 ?c [1] [2] at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit v oh high-level output voltage v i = v ih or v il i o = ? 1.5 ma; v cc(a) =v cc(b) = 0.8 v - 0.69 - v v ol low-level output voltage v i = v ih or v il i o = 1.5 ma; v cc(a) =v cc(b) = 0.8 v - 0.07 - v i i input leakage current ndir, noe input; v i = 0 v or 3.6 v; v cc(a) =v cc(b) = 0.8 v to 3.6 v - ? 0.025 ? 0.25 ? a i oz off-state output current a or b port; v o =0 vor v cco ; v cc(a) =v cc(b) =3.6v [3] - ? 0.5 ? 2.5 ? a suspend mode a port; v o =0vorv cco ; v cc(a) = 3.6 v; v cc(b) =0v [3] - ? 0.5 ? 2.5 ? a suspend mode b port; v o =0vorv cco ; v cc(a) =0 v; v cc(b) =3.6v [3] - ? 0.5 ? 2.5 ? a i off power-off leakage current a port; v i or v o = 0 v to 3.6 v; v cc(a) =0v;v cc(b) = 0.8 v to 3.6 v - ? 0.1 ? 1 ? a b port; v i or v o = 0 v to 3.6 v; v cc(b) =0v;v cc(a) = 0.8 v to 3.6 v - ? 0.1 ? 1 ? a c i input capacitance ndir, noe input; v i = 0 v or 3.3 v; v cc(a) =v cc(b) =3.3v -2.0-pf c i/o input/output capacitance a and b port; v o = 3.3 v or 0 v; v cc(a) =v cc(b) =3.3v -4.5-pf
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 7 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state table 7. static characteristics [1] [2] at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min max min max v ih high-level input voltage data input v cci = 0.8 v 0.70v cci - 0.70v cci -v v cci = 1.1 v to 1.95 v 0.65v cci - 0.65v cci -v v cci = 2.3 v to 2.7 v 1.6 - 1.6 - v v cci = 3.0 v to 3.6 v 2 - 2 - v ndir, noe input v cc(a) = 0.8 v 0.70v cc(a) -0.70v cc(a) -v v cc(a) = 1.1 v to 1.95 v 0.65v cc(a) -0.65v cc(a) -v v cc(a) = 2.3 v to 2.7 v 1.6 - 1.6 - v v cc(a) = 3.0 v to 3.6 v 2 - 2 - v v il low-level input voltage data input v cci = 0.8 v - 0.30v cci - 0.30v cci v v cci = 1.1 v to 1.95 v - 0.35v cci - 0.35v cci v v cci = 2.3 v to 2.7 v - 0.7 - 0.7 v v cci = 3.0 v to 3.6 v - 0.8 - 0.8 v ndir, noe input v cc(a) = 0.8 v - 0.30v cc(a) - 0.30v cc(a) v v cc(a) = 1.1 v to 1.95 v - 0.35v cc(a) - 0.35v cc(a) v v cc(a) = 2.3 v to 2.7 v - 0.7 - 0.7 v v cc(a) = 3.0 v to 3.6 v - 0.8 - 0.8 v v oh high-level output voltage v i = v ih or v il i o = ? 100 ? a; v cc(a) =v cc(b) = 0.8 v to 3.6 v v cco ? 0.1 - v cco ? 0.1 - v i o = ? 3ma; v cc(a) =v cc(b) =1.1v 0.85 - 0.85 - v i o = ? 6ma; v cc(a) =v cc(b) =1.4v 1.05 - 1.05 - v i o = ? 8ma; v cc(a) =v cc(b) =1.65v 1.2 - 1.2 - v i o = ? 9ma; v cc(a) =v cc(b) =2.3v 1.75 - 1.75 - v i o = ? 12 ma; v cc(a) =v cc(b) =3.0v 2.3 - 2.3 - v
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 8 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state v ol low-level output voltage v i = v ih or v il i o = 100 ? a; v cc(a) =v cc(b) = 0.8 v to 3.6 v -0.1-0.1v i o = 3 ma; v cc(a) =v cc(b) = 1.1 v - 0.25 - 0.25 v i o = 6 ma; v cc(a) =v cc(b) = 1.4 v - 0.35 - 0.35 v i o = 8 ma; v cc(a) =v cc(b) =1.65v - 0.45 - 0.45 v i o = 9 ma; v cc(a) =v cc(b) = 2.3 v - 0.55 - 0.55 v i o = 12 ma; v cc(a) =v cc(b) =3.0v -0.7-0.7v i i input leakage current ndir, noe input; v i = 0 v or 3.6 v; v cc(a) =v cc(b) = 0.8 v to 3.6 v - ? 1- ? 5 ? a i oz off-state output current a or b port; v o =0 vor v cco ; v cc(a) =v cc(b) =3.6v [3] - ? 5- ? 30 ? a suspend mode a port; v o =0vorv cco ; v cc(a) = 3.6 v; v cc(b) =0v [3] - ? 5- ? 30 ? a suspend mode b port; v o =0vorv cco ; v cc(a) =0 v; v cc(b) =3.6v [3] - ? 5- ? 30 ? a i off power-off leakage current a port; v i or v o = 0 v to 3.6 v; v cc(a) =0v; v cc(b) = 0.8 v to 3.6 v - ? 5- ? 30 ? a b port; v i or v o = 0 v to 3.6 v; v cc(b) =0v; v cc(a) = 0.8 v to 3.6 v - ? 5- ? 30 ? a table 7. static characteristics ?continued [1] [2] at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min max min max
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 9 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state [1] v cco is the supply voltage associated with the output port. [2] v cci is the supply voltage associated with the data input port. [3] for i/o ports, the parameter i oz includes the input leakage current. i cc supply current a port; v i = 0 v or v cci ; i o = 0 a v cc(a) = 0.8 v to 3.6 v; v cc(b) = 0.8 v to 3.6 v -60-250 ? a v cc(a) = 1.1 v to 3.6 v; v cc(b) = 1.1 v to 3.6 v -50-200 ? a v cc(a) = 3.6 v; v cc(b) = 0 v - 50 - 200 ? a v cc(a) = 0 v; v cc(b) = 3.6 v ? 10 - ? 40 - ? a b port; v i = 0 v or v cci ; i o = 0 a v cc(a) = 0.8 v to 3.6 v; v cc(b) = 0.8 v to 3.6 v -60-250 ? a v cc(a) = 1.1 v to 3.6 v; v cc(b) = 1.1 v to 3.6 v -50-200 ? a v cc(a) = 3.6 v; v cc(b) = 0 v ? 10 - ? 40 - ? a v cc(a) = 0 v; v cc(b) = 3.6 v - 50 - 200 ? a a plus b port (i cc(a) + i cc(b) ); i o =0a; v i =0 vor v cci ; v cc(a) = 0.8 v to 3.6 v; v cc(b) = 0.8 v to 3.6 v - 110 - 370 ? a a plus b port (i cc(a) + i cc(b) ); i o =0a; v i =0 vor v cci ; v cc(a) = 1.1 v to 3.6 v; v cc(b) = 1.1 v to 3.6 v -90-300 ? a table 7. static characteristics ?continued [1] [2] at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min max min max table 8. typical total supply current (i cc(a) + i cc(b) ) v cc(a) v cc(b) unit 0 v 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v 0 v 0 0.2 0.2 0.2 0.2 0.2 0.2 ? a 0.8 v 0.2 0.2 0.2 0.2 0.2 0.6 3.2 ? a 1.2 v 0.2 0.2 0.2 0.2 0.2 0.2 1.6 ? a 1.5 v 0.2 0.2 0.2 0.2 0.2 0.2 0.8 ? a 1.8 v 0.2 0.2 0.2 0.2 0.2 0.2 0.4 ? a 2.5 v 0.2 0.6 0.2 0.2 0.2 0.2 0.2 ? a 3.3 v 0.2 3.2 1.6 0.8 0.4 0.2 0.2 ? a
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 10 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state 10. dynamic characteristics [1] c pd is used to determine the dynamic power dissipation (p d in ? w). p d =c pd ? v cc 2 ? f i ? n+ ? (c l ? v cc 2 ? f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l ? v cc 2 ? f o ) = sum of the outputs. [2] f i = 10 mhz; v i =gndtov cc ; t r = t f = 1 ns; c l = 0 pf; r l = ? ? . table 9. typical power dissi pation capacitance at v cc(a) = v cc(b) and t amb = 25 ?c [1] [2] voltages are referenced to gnd (ground = 0 v). symbol parameter conditions v cc(a) = v cc(b) unit 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v c pd power dissipation capacitance a port: (direction nan to nbn); output enabled 0.2 0.2 0.2 0.2 0.3 0.4 pf a port: (direction nan to nbn); output disabled 0.2 0.2 0.2 0.2 0.3 0.4 pf a port: (direction nbn to nan); output enabled 9 9.7 9.8 10.3 11.7 13.7 pf a port: (direction nbn to nan); output disabled 0.6 0.6 0.6 0.7 0.7 0.7 pf b port: (direction nan to nbn); output enabled 9 9.7 9.8 10.3 11.7 13.7 pf b port: (direction nan to nbn); output disabled 0.6 0.6 0.6 0.7 0.7 0.7 pf b port: (direction nbn to nan); output enabled 0.2 0.2 0.2 0.2 0.3 0.4 pf b port: (direction nbn to nan); output disabled 0.2 0.2 0.2 0.2 0.3 0.4 pf
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 11 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . table 10. typical dynamic characteristics at v cc(a) = 0.8 v and t amb = 25 ?c [1] voltages are referenced to gnd (ground = 0 v); for test circuit see figure 6 ; for wave forms see figure 4 and figure 5 symbol parameter conditions v cc(b) unit 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v t pd propagation delay nan to nbn 14.4 7.0 6.2 6.0 5.9 6.0 ns nbn to nan 14.4 12.4 12.1 11.9 11.8 11.8 ns t dis disable time noe to nan 16.2 16.2 16.2 16.2 16.2 16.2 ns noe to nbn 17.6 10.0 9.0 9.1 8.7 9.3 ns t en enable time noe to nan 21.9 21.9 21.9 21.9 21.9 21.9 ns noe to nbn 22.2 11.1 9.8 9.4 9.4 9.6 ns table 11. typical dynamic characteristics at v cc(b) = 0.8 v and t amb = 25 ?c [1] voltages are referenced to gnd (ground = 0 v); for test circuit see figure 6 ; for wave forms see figure 4 and figure 5 symbol parameter conditions v cc(a) unit 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v t pd propagation delay nan to nbn 14.4 12.4 12.1 11.9 11.8 11.8 ns nbn to nan 14.4 7.0 6.2 6.0 5.9 6.0 ns t dis disable time noe to nan 16.2 5.9 4.4 4.2 3.1 3.5 ns noe to nbn 17.6 14.2 13.7 13.6 13.3 13.1 ns t en enable time noe to nan 21.9 6.4 4.4 3.5 2.6 2.3 ns noe to nbn 22.2 17.7 17.2 17.0 16.8 16.7 ns
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 12 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . table 12. dynamic characteristics for temperature range ? 40 ? c to +85 ?c [1] voltages are referenced to gnd (ground = 0 v); for test circuit see figure 6 ; for wave forms see figure 4 and figure 5 . symbol parameter conditions v cc(b) unit 1.2 v ? 0.1 v 1.5 v ? 0.1 v 1.8 v ? 0.15 v 2.5 v ? 0.2 v 3.3 v ? 0.3 v min max min max min max min max min max v cc(a) = 1.1 v to 1.3 v t pd propagation delay nan to nbn 0.5 9.2 0.5 6.9 0.5 6.0 0.5 5.1 0.5 4.9 ns nbn to nan 0.5 9.2 0.5 8.7 0.5 8.5 0.5 8.2 0.5 8.0 ns t dis disable time noe to nan 1.5 11.6 1.5 11.6 1.5 11.6 1.5 11.6 1.5 11.6 ns noe to nbn 1.5 12.5 1.5 9.7 1.5 9.5 1.0 8.1 1.0 8.9 ns t en enable time noe to nan 1.0 14.5 1.0 14.5 1.0 14.5 1.0 14.5 1.0 14.5 ns noe to nbn 1.1 14.9 1.1 11.0 1.1 9.6 1.0 8.1 1.0 7.7 ns v cc(a) = 1.4 v to 1.6 v t pd propagation delay nan to nbn 0.5 8.7 0.5 6.2 0.5 5.2 0.5 4.1 0.5 3.7 ns nbn to nan 0.5 6.9 0.5 6.2 0.5 5.9 0.5 5.6 0.5 5.5 ns t dis disable time noe to nan 1.5 9.1 1.5 9.1 1.5 9.1 1.5 9.1 1.5 9.1 ns noe to nbn 1.5 11.4 1.5 8.7 1.5 7.5 1.0 6.5 1.0 6.3 ns t en enable time noe to nan 1.0 10.1 1.0 10.1 1.0 10.1 1.0 10.1 1.0 10.1 ns noe to nbn 1.0 13.5 1.0 10.1 0.5 8.1 0.5 5.9 0.5 5.2 ns v cc(a) = 1.65 v to 1.95 v t pd propagation delay nan to nbn 0.5 8.5 0.5 5.9 0.5 4.8 0.5 3.7 0.5 3.3 ns nbn to nan 0.5 6.0 0.5 5.2 0.5 4.8 0.5 4.5 0.5 4.4 ns t dis disable time noe to nan 1.5 7.7 1.5 7.7 1.5 7.7 1.5 7.7 1.5 7.7 ns noe to nbn 1.5 11.1 1.5 8.4 1.5 7.1 1.0 5.9 1.0 5.7 ns t en enable time noe to nan 1.0 7.8 1.0 7.8 1.0 7.8 1.0 7.8 1.0 7.8 ns noe to nbn 1.0 13.0 1.0 9.2 0.5 7.4 0.5 5.3 0.5 4.5 ns v cc(a) = 2.3v to 2.7v t pd propagation delay nan to nbn 0.5 8.2 0.5 5.6 0.5 4.6 0.5 3.3 0.5 2.8 ns nbn to nan 0.5 5.1 0.5 4.1 0.5 3.7 0.5 3.4 0.5 3.2 ns t dis disable time noe to nan 1.0 6.1 1.0 6.1 1.0 6.1 1.0 6.1 1.0 6.1 ns noe to nbn 1.0 10.6 1.0 7.9 1.0 6.6 1.0 6.1 1.0 5.2 ns t en enable time noe to nan 0.5 5.3 0.5 5.3 0.5 5.3 0.5 5.3 0.5 5.3 ns noe to nbn 0.5 12.5 0.5 9.4 0.5 7.3 0.5 5.1 0.5 4.5 ns v cc(a) = 3.0v to 3.6v t pd propagation delay nan to nbn 0.5 8.0 0.5 5.5 0.5 4.4 0.5 3.2 0.5 2.7 ns nbn to nan 0.5 4.9 0.5 3.7 0.5 3.3 0.5 2.9 0.5 2.7 ns t dis disable time noe to nan 0.5 5.0 0.5 5.0 0.5 5.0 0.5 5.0 0.5 5.0 ns noe to nbn 1.0 10.3 1.0 7.7 1.0 6.5 1.0 5.2 0.5 5.0 ns t en enable time noe to nan 0.5 4.3 0.5 4.3 0.5 4.2 0.5 4.1 0.5 4.0 ns noe to nbn 0.5 12.4 0.5 9.3 0.5 7.2 0.5 4.9 0.5 4.0 ns
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 13 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . table 13. dynamic characteristics for temperature range ? 40 ? c to +125 ?c [1] voltages are referenced to gnd (ground = 0 v); for test circuit see figure 6 ; for wave forms see figure 4 and figure 5 symbol parameter conditions v cc(b) unit 1.2 v ? 0.1 v 1.5 v ? 0.1 v 1.8 v ? 0.15 v 2.5 v ? 0.2 v 3.3 v ? 0.3 v min max min max min max min max min max v cc(a) = 1.1 v to 1.3 v t pd propagation delay nan to nbn 0.5 10.2 0.5 7.6 0.5 6.6 0.5 5.7 0.5 5.4 ns nbn to nan 0.5 10.2 0.5 9.6 0.5 9.4 0.5 9.1 0.5 8.8 ns t dis disable time noe to nan 1.5 12.8 1.5 12.8 1.5 12.8 1.5 12.8 1.5 12.8 ns noe to nbn 1.5 13.8 1.5 10.7 1.5 10.5 1.0 9.0 1.5 9.8 ns t en enable time noe to nan 1.0 16.0 1.0 16.0 1.0 16.0 1.0 16.0 1.0 16.0 ns noe to nbn 1.1 16.4 1.1 12.1 1.1 10.6 1.0 9.0 1.0 8.5 ns v cc(a) = 1.4 v to 1.6 v t pd propagation delay nan to nbn 0.5 9.6 0.5 6.9 0.5 5.8 0.5 4.6 0.5 4.1 ns nbn to nan 0.5 7.6 0.5 6.9 0.5 6.5 0.5 6.2 0.5 6.1 ns t dis disable time noe to nan 1.5 10.1 1.5 10.1 1.5 10.1 1.5 10.1 1.5 10.1 ns noe to nbn 1.5 12.6 1.5 9.6 1.5 8.3 1.0 7.2 1.0 7.0 ns t en enable time noe to nan 1.0 11.2 1.0 11.2 1.0 11.2 1.0 11.2 1.0 11.2 ns noe to nbn 1.0 14.9 1.0 11.2 0.5 9.0 0.5 6.5 0.5 5.8 ns v cc(a) = 1.65 v to 1.95 v t pd propagation delay nan to nbn 0.5 9.4 0.5 6.5 0.5 5.3 0.5 4.1 0.5 3.7 ns nbn to nan 0.5 6.6 0.5 5.8 0.5 5.3 0.5 5.0 0.5 4.9 ns t dis disable time noe to nan 1.5 8.5 1.5 8.5 1.5 8.5 1.5 8.5 1.5 8.5 ns noe to nbn 1.5 12.3 1.5 9.3 1.5 7.9 1.0 6.5 1.0 6.3 ns t en enable time noe to nan 1.0 8.6 1.0 8.6 1.0 8.6 1.0 8.6 1.0 8.6 ns noe to nbn 1.0 14.3 1.0 10.2 0.5 8.2 0.5 5.9 0.5 5.0 ns v cc(a) = 2.3v to 2.7v t pd propagation delay nan to nbn 0.5 9.1 0.5 6.2 0.5 5.1 0.5 3.7 0.5 3.1 ns nbn to nan 0.5 5.7 0.5 4.6 0.5 4.1 0.5 3.8 0.5 3.6 ns t dis disable time noe to nan 1.0 6.8 1.0 6.8 1.0 6.8 1.0 6.8 1.0 6.8 ns noe to nbn 1.0 11.7 1.0 8.7 1.0 7.3 1.0 6.8 1.0 5.8 ns t en enable time noe to nan 0.5 5.9 0.5 5.9 0.5 5.9 0.5 5.9 0.5 5.9 ns noe to nbn 0.5 13.8 0.5 10.4 0.5 8.1 0.5 5.7 0.5 5.0 ns v cc(a) = 3.0v to 3.6v t pd propagation delay nan to nbn 0.5 8.8 0.5 6.1 0.5 4.9 0.5 3.6 0.5 3.0 ns nbn to nan 0.5 5.4 0.5 4.1 0.5 3.7 0.5 3.2 0.5 3.0 ns t dis disable time noe to nan 0.5 5.5 0.5 5.5 0.5 5.5 0.5 5.5 0.5 5.5 ns noe to nbn 1.0 11.4 1.0 8.5 1.0 7.2 1.0 5.8 0.5 5.5 ns t en enable time noe to nan 0.5 4.8 0.5 4.8 0.5 4.7 0.5 4.6 0.5 4.4 ns noe to nbn 0.5 13.7 0.5 10.3 0.5 8.0 0.5 5.4 0.5 4.4 ns
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 14 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state 11. waveforms [1] v cci is the supply voltage associated with the data input port. [2] v cco is the supply voltage associated with the output port. measurement points are given in table 14 . v ol and v oh are typical output voltage levels that occur with the output load. fig 4. the data input (nan, nbn) to output (nbn, nan) propagation delay times 001aak285 nan, nbn input nbn, nan output t plh t phl gnd v i v oh v m v m v ol measurement points are given in table 14 . v ol and v oh are typical output voltage levels that occur with the output load. fig 5. enable and disable times 001aak286 outputs disabled outputs enabled noe input gnd output low-to-off off-to-low output high-to-off off-to-high outputs enabled v m t plz t pzl t pzh t phz v x v m v oh v y v m v ol v cco v i gnd table 14. measurement points supply voltage input [1] output [2] v cc(a) , v cc(b) v m v m v x v y 0.8 v to 1.6 v 0.5v cci 0.5v cco v ol +0.1v v oh ? 0.1 v 1.65 v to 2.7 v 0.5v cci 0.5v cco v ol +0.15v v oh ? 0.15 v 3.0 v to 3.6 v 0.5v cci 0.5v cco v ol +0.3v v oh ? 0.3 v
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 15 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state [1] v cci is the supply voltage associated with the data input port. [2] dv/dt ? 1.0 v/ns [3] v cco is the supply voltage associated with the output port. test data is given in table 15 . r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance. v ext = external voltage for measuring switching times. fig 6. test circuit for measuring switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aae331 v ext v cc v i v o dut c l r t r l r l g table 15. test data supply voltage input load v ext v cc(a) , v cc(b) v i [1] ? t/ ? v [2] c l r l t plh , t phl t pzh , t phz t pzl , t plz [3] 0.8 v to 1.6 v v cci ?? 1.0ns/v 15pf 2k ? open gnd 2v cco 1.65 v to 2.7 v v cci ? 1.0ns/v 15pf 2k ? open gnd 2v cco 3.0 v to 3.6 v v cci ? 1.0ns/v 15pf 2k ? open gnd 2v cco
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 16 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state 12. typical propagation delay characteristics a. propagation delay (nan to nbn); v cc(a) = 0.8 v b. propagation delay (nan to nbn); v cc(b) = 0.8 v (1) v cc(b) = 0.8 v. (2) v cc(b) = 1.2 v. (3) v cc(b) = 1.5 v. (4) v cc(b) = 1.8 v. (5) v cc(b) = 2.5 v. (6) v cc(b) = 3.3 v. (1) v cc(a) = 0.8 v. (2) v cc(a) = 1.2 v. (3) v cc(a) = 1.5 v. (4) v cc(a) = 1.8 v. (5) v cc(a) = 2.5 v. (6) v cc(a) = 3.3 v. fig 7. typical propagation delay versus load capacitance; t amb = 25 ?c 001aai476 c l (pf) 060 40 20 12 16 8 20 24 t pd (ns) 4 (1) (2) (3) (4) (5) (6) c l (pf) 060 40 20 001aai477 13 17 21 t pd (ns) 9 (1) (2) (3) (4) (5) (6)
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 17 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state a. low to high propagation delay (nan to nbn); v cc(a) = 1.2 v b. high to low propagation delay (nan to nbn); v cc(a) = 1.2 v c. low to high propagation delay (nan to nbn); v cc(a) = 1.5 v d. high to low propagation delay (nan to nbn); v cc(a) = 1.5 v (1) v cc(b) = 1.2 v. (2) v cc(b) = 1.5 v. (3) v cc(b) = 1.8 v. (4) v cc(b) = 2.5 v. (5) v cc(b) = 3.3 v. fig 8. typical propagation delay versus load capacitance; t amb = 25 ?c c l (pf) 060 40 20 001aai478 3 5 7 t plh (ns) 1 (1) (2) (3) (4) (5) c l (pf) 060 40 20 001aai491 3 5 7 t phl (ns) 1 (4) (5) (1) (2) (3) c l (pf) 060 40 20 001aai479 3 5 7 t plh (ns) 1 (1) (2) (3) (4) (5) c l (pf) 060 40 20 001aai480 3 5 7 t phl (ns) 1 (1) (2) (3) (5) (4)
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 18 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state a. low to high propagation delay (nan to nbn); v cc(a) = 1.8 v b. high to low propagation delay (nan to nbn); v cc(a) = 1.8 v c. low to high propagation delay (nan to nbn); v cc(a) = 2.5 v d. high to low propagation delay (nan to nbn); v cc(a) = 2.5 v (1) v cc(b) = 1.2 v. (2) v cc(b) = 1.5 v. (3) v cc(b) = 1.8 v. (4) v cc(b) = 2.5 v. (5) v cc(b) = 3.3 v. fig 9. typical propagation delay versus load capacitance; t amb = 25 ?c c l (pf) 060 40 20 001aai481 3 5 7 t plh (ns) 1 (1) (2) (3) (5) (4) c l (pf) 060 40 20 001aai482 3 5 7 t phl (ns) 1 (1) (2) (3) (5) (4) c l (pf) 060 40 20 001aai483 3 5 7 t plh (ns) 1 (1) (2) (3) (5) (4) c l (pf) 060 40 20 001aai486 3 5 7 t phl (ns) 1 (1) (2) (3) (5) (4)
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 19 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state a. low to high propagation delay (nan to nbn); v cc(a) = 3.3 v b. high to low propagation delay (nan to nbn); v cc(a) = 3.3 v (1) v cc(b) = 1.2 v. (2) v cc(b) = 1.5 v. (3) v cc(b) = 1.8 v. (4) v cc(b) = 2.5 v. (5) v cc(b) = 3.3 v. fig 10. typical propagation delay versus load capacitance; t amb = 25 ?c c l (pf) 060 40 20 001aai485 3 5 7 t plh (ns) 1 (1) (2) (3) (5) (4) c l (pf) 060 40 20 001aai484 3 5 7 t phl (ns) 1 (1) (2) (3) (5) (4)
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 20 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state 13. package outline fig 11. package outline sot536-1 (lfbga96) 0.8 a 1 ba 2 unit d y e references outline version european projection issue date 00-03-04 03-02-05 iec jedec jeita mm 1.5 0.41 0.31 1.2 0.9 5.6 5.4 y 1 13.6 13.4 0.51 0.41 0.1 0.2 e 1 4 e 2 12 dimensions (mm are the original dimensions) sot536-1 e 0.15 v 0.1 w 0 5 10 mm scale sot536-1 lfbga96: plastic low profile fine-pitch ball grid array package; 96 balls; body 13.5 x 5.5 x 1.05 mm a max. a a 2 a 1 detail x e e x d e a b c d e f h g j k l m p n r t 246 135 b a e 2 e 1 ball a1 index area ball a1 index area y y 1 c b c ac c b ? v m ? w m 1/2 e 1/2 e
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 21 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state 14. abbreviations 15. revision history table 16. abbreviations acronym description cdm charged device model dut device under test esd electrostatic discharge hbm human body model mm machine model table 17. revision history document id release date data sheet status change notice supersedes 74avc32t245 v.1 20130116 product data sheet - -
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 22 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state 16. legal information 16.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. 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nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74avc32t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 16 january 2013 23 of 24 nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 16.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 17. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74avc32t245 32-bit dual supply translating transceiver; 3-state ? nxp b.v. 2013. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 16 january 2013 document identifier: 74avc32t245 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 18. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 functional description . . . . . . . . . . . . . . . . . . . 5 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 recommended operating conditions. . . . . . . . 6 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 6 10 dynamic characteristics . . . . . . . . . . . . . . . . . 10 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 12 typical propagation delay characteristics . . 16 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 20 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 21 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . 21 16 legal information. . . . . . . . . . . . . . . . . . . . . . . 22 16.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 22 16.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 16.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 16.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 23 17 contact information. . . . . . . . . . . . . . . . . . . . . 23 18 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

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